1. Field of the Invention
The present invention relates to a thin-film device comprising a capacitor and a method of manufacturing such a thin-film device.
2. Description of the Related Art
With increasing demands for reductions in dimensions and thickness of high frequency electronic apparatuses such as cellular phones, reductions in dimensions and profile of electronic components mounted on the high frequency electronic apparatuses have been sought. Some of the electronic components comprise capacitors. Each capacitor typically incorporates a dielectric layer and a pair of conductor layers disposed to sandwich the dielectric layer.
To achieve reductions in dimensions and profile of an electronic component comprising a capacitor, important factors are a reduction in area of a region in which the pair of conductor layers are opposed to each other with the dielectric layer disposed in between and a reduction in the number of layers making up the capacitor. Basically, in prior art, a material having a high permittivity is used as a dielectric material forming the dielectric layer and the thickness of the dielectric layer is reduced to achieve a reduction in area of the above-mentioned region and a reduction in the number of the layers making up the capacitor.
As conventional electronic components comprising capacitors, a thin-film capacitor as disclosed in each of Japanese Published Patent Application (hereinafter referred to as ‘JP-A’) 2003-347155, JP-A 2003-17366, and JP-A63-10513 is known. This thin-film capacitor incorporates a lower electrode layer, a dielectric layer and an upper electrode layer formed one by one on a substrate through the use of thin-film forming techniques. An electronic component formed through thin-film forming techniques such as this thin-film capacitor is called a thin-film device in the present patent application.
JP-A 9-312457 discloses a circuit board including capacitative elements formed through thin-film forming techniques.
If a thin-film device comprising a capacitor has such a structure that an upper electrode layer is opposed to a corner portion formed by the top surface and a side surface of a lower electrode layer, a dielectric layer being disposed between the upper electrode layer and the corner portion, the thickness of a portion of the dielectric layer near the corner portion is likely to be smaller than the thickness of a portion of the dielectric layer located on the top surface of the lower electrode layer. As a result, the thin-film device having such a structure has a problem that a short-circuit failure and a reduction in withstand voltage of the capacitor are likely to occur.
As a method of solving this problem, JP-A 2003-17366 discloses a method in which an end of the lower electrode layer is formed to be a tapered surface, and a method in which the top surface of the lower electrode layer and that of an insulating layer disposed around the lower electrode layer are flattened to form the dielectric layer and the upper electrode layer one by one on the flattened top surfaces.
JP-A 63-10513 discloses such a technique that a metal film for conduction is formed above the lower electrode layer with the dielectric layer disposed between the lower conductor layer and the metal film, and the upper electrode layer is formed on the metal film by selective plating. In addition, to prevent the metal film for conduction from being extremely thin or broken in a stepped portion formed on the periphery of the lower electrode layer, this publication discloses forming a plating portion near the stepped portion after the formation of the metal film for conduction, the plating portion being provided for bringing the metal film into a completely conducting state.
To prevent a short-circuit between lower and upper electrode layers resulting from a reduction in thickness of a portion of a dielectric layer near the corner portion formed by the top surface and the side surface of the lower electrode layer, JP-A 9-312457 discloses such a technique that the upper electrode layer is formed after a resin insulator is formed on a portion of the dielectric layer near the corner portion.
In the thin-film device comprising a capacitor, the dielectric layer is formed through thin-film forming techniques, so that it is possible to reduce the thickness of the dielectric layer and to thereby reduce the profile of the thin-film device.
In the thin-film device comprising a capacitor, the area of a region in which the lower conductor layer and the upper conductor layer are opposed to each other with the dielectric layer disposed in between is one of parameters for determining the capacitance. Therefore, if the thin-film device has such a structure that the area of the above-mentioned region changes in response to a change in relative positional relationship between the lower and upper electrode layers, there arises a problem that a change in relative positional relationship between the lower and upper electrode layers occurring in the course of manufacture of the thin-film device results in a change in capacitance.
In the thin-film device comprising a capacitor, if the positional relationship between the lower and upper electrode layers is predetermined such that the periphery of the top surface of the lower electrode layer and the periphery of the bottom surface of the upper electrode layer touch each other when seen from above the upper electrode layer, there is a problem as described below, in addition to the above-described problem that the capacitance changes in response to a change in relative positional relationship between the lower and upper electrode layers. In this case, if the relative positional relationship between the lower and upper electrode layers changes in the course of manufacture of the thin-film device, there occurs a case in which the periphery of the bottom surface of the upper electrode layer is located outside or inside the periphery of the top surface of the lower electrode layer. Consequently, there is a possibility that the upper electrode layer is opposed to or not opposed to the corner portion formed by the top surface and the side surface of the lower electrode layer, the dielectric layer being disposed between the corner portion and the upper electrode layer. Here, if the upper electrode layer is opposed to the corner portion formed by the top surface and the side surface of the lower electrode layer, the dielectric layer being disposed between the corner portion and the upper electrode layer, it is likely that a short-circuit failure and a reduction in withstand voltage of the capacitor occur as mentioned above. Therefore, there arises a problem that variations in characteristics of the capacitor increase in response to a change in relative positional relationship between the lower and upper electrode layers when the positional relationship between the lower and upper electrode layers is predetermined such that the periphery of the top surface of the lower electrode layer and the periphery of the bottom surface of the upper electrode layer touch each other when seen from above the upper electrode layer.